I spent a lot of time last summer messing around with VHDL and an Upduino. Nothing too serious, but it was a lot of fun. During one of the many nights I spent researching various things, I came across vpp. It was a preprocessor for VHDL that Takashige Sugie had been working on since 2007, licensed under GPL2.
I was looking for a preprocessor out of curiosity more than practicality, as I had come across many articles and documents saying the best preprocessor for VHDL was no preprocessor at all, as many of the functions are already built in. I was also in the process of trying to figure out how to use Lattice Radiant from the command-line (an endeavor I have since put on the back burner), and hoped this would help tie the open source tools and Radiant together. Understanding that a preprocessor for VHDL is basically useless, I decided to fork vpp anyway. My goal was to just to see what it could do.
I unfortunately had to discard the commit history as Sugie had developed it in CVS, and I typically use git. I tried several programs for transferring the commit history but unfortunately none worked like I had hoped. After moving everything to a git repo, replacing all of the GNU automake files with a simple Makefile, and fixing some compiler errors that had cropped up, everything worked well enough, and I left it at that. Though, there were a few bugs that I told myself I would go back and fix later.
After spending some of winter break working on the Advent of Code, as well as writing an assembler for the Intel 4004 microprocessor, both in Python, I’ve grown to love the simplicity and ease by which I can write a very powerful program without having to worry about the lower levels of strings, or if I’ve setup my Makefile correctly. It’s the difference between me finishing a project and getting too frustrated and moving on to something else.
As the limitations of my limited knowledge of the source code of vpp grew (though I made many attempts to understand it), and running into issues such as undef segfaulting and -D label=value not actually passing in a value, I decided to try rewriting VHDLproc in Python. It didn’t take very long either. It was as simple as setting up a proper argparse, reading the file and stepping through each line, and doing actions based on that line, such as printing to the screen, doing a multiline comment, or adding an if statement to the ifstack. I even added nested for repetitions, something missing from the C version altogether.
VHDLproc went from 6 source files with around 1600 lines of code, to 1 file with only 240. The best part is, it’s not limited to VHDL, and can be used for practically any language given changing the comment character, and very easily extended in the future if I decide to add more directives or functionality. Sometimes it’s better to not do things the “right” way.
To use VHDLproc, its as simple as: $ vhdlproc input.vhdl and it will parse and save automatically to input-out.vhdl. Full usage information and source code can be found on the GitHub repo, and is licensed under GPL3.