Definitions
- Analysis
- The syntax checking and compilation of a VHDL design into a design library
- Architecture
- A library unit associated with an entity which describes its internal operation or organization
- Component
- A definition of the interface to a sub-module, rather like a “socket”, to which an entity may be bound
- Concurrent Statements
- Statements within an architecture which execute concurrently, independently of their order
- Configuration
- Defines the “binding” of each component instance to an entity, and each entity to an architecture; can be defined using a configuration library unit or from within an architecture
- Design File
- A text file containing source code for one or more design units
- Design Library
- A data structure containing analyzed design units (library units)
- Design Unit
- A VHDL module contained in a design file, consisting of the source code for a library unit preceded by any required Library or Use clauses; analysis of a design unit defines the corresponding library unit in a design library
- Elaboration
- The building of a simulatable model through the top-down binding of its structural hierarchy, according to the configuration selected
- Entity
- A library unit which describes the external interface of a hardware module
- Function
- A group of sequential statements which can be “called” from different places in a model, reading one or more input parameters and returning a single value
- Library Unit
- An analysed design unit; the five types of library units are: entity, architecture, package, package body and configuration
- Overloading
- The definition of multiple functions or procedures with the same name, which operate on different parameter combinations or types
- Package
- A primary unit containing a collection of declarations and/or specifications which may be used in other library units
- Package Body
- A secondary unit associated with a package, whose main purpose is to contain the full code for any functions or procedures which have been declared in the associated package
- Primary Unit
- A library unit which can exist in a design library; the primary design units are entity, package and configuration
- Procedure
- A group of sequential statements which can be “called” from different places in a model. It may have parameters of modes in, out, or inout
- Process
- A concurrent statement which contains a collection of sequential statements, and which can interact concurrently with other concurrent statements
- Resolution
- The determination of the value of a signal when it is simultaneously driven by more than one source
- Scope
- The region of VHDL code within which a declared item (e.g. a constant) may be used
- Secondary Unit
- A library unit which defines a body associated with a primary unit which has already been analyzed into the same design library; the secondary units are architecture (associated with entity) and package body (associated with package)
- Sequential Statements
- Statements which are executed in the order they are written, as with “conventional” software languages